National Instruments (NI) has announced the LabVIEW FPGA IP Builder add-on, which uses Xilinx VivadoHigh-Level Synthesis technology to simplify high-performance field-programmable gate array (FPGA) algorithm design.
This new LabVIEW add-on is aimed at enhancing productivity by reducing the need for manual optimization of high-performance algorithms. Instead, users specify functional behaviour along with design constraints and the software automatically generates a hardware implementation to meet requirements.
"Our vision for the LabVIEW platform is to empower domain experts to represent their algorithms using natural programming paradigms and provide a seamless path for deploying to high-performance hardware. High-level synthesis technology is central to this vision - it empowers system designers to spend less time optimizing their FPGA algorithms and more time innovating," said David Fuller, Vice-President, Applications and Embedded Software, NI.
