The collaboration aims to deliver real-time, safety-critical, and power-efficient solutions for automotive, industrial, and data center sectors by combining Cyient’s Analog Mixed Signal expertise with MIPS' advanced CPU IP for next-gen embedded platforms
Cyient Semiconductors, a rapidly growing custom silicon firm based in Hyderabad, has partnered with MIPS, a global leader in RISC-V processor IP, to co-develop domain-specific ASIC and ASSP solutions using the MIPS Atlas processor portfolio. The collaboration aims to deliver real-time, safety-critical, and power-efficient solutions tailored for high-performance applications in automotive, industrial, and data center sectors. Key focus areas include motor control and data center power delivery, combining Cyient’s expertise in Analog Mixed Signal design with MIPS' advanced CPU IP to drive innovation and performance across next-generation embedded platforms.
“As compute systems scale from cloud to the edge, intelligent power delivery is emerging as a key enabler of performance and efficiency,” said Suman Narayan, CEO of Cyient Semiconductors. “Our collaboration with MIPS allows us to bring together embedded intelligence and advanced power architectures in custom silicon platforms built on a scalable, open foundation. Together, we are designing tomorrow’s semiconductors — purpose-built for a more connected and power-efficient world.”
“The problem of power efficiency and motor control are both real-time compute workloads for which MIPS M8500 microcontrollers are the optimal choice,” said Sameer Wasson, CEO of MIPS. “Building around our best-in-class real-time and control-loop performance and efficiency, Cyient can bring their unique capability in intelligent power delivery into custom ASIC and ASSP designs to build differentiated solutions that meet our customers unique needs in their target markets.”
Demand for software defined vehicles, data center infrastructure, and industrial automation is driving growth for custom silicon. Customers can build advanced, differentiated solutions that are easy to program using MIPS advanced processor IP, based on the open RISC-V instruction set architecture, combined with Cyient intelligent power and mixed-signal design expertise.
Targeted applications include motor drive control, intelligent power management, power delivery management, and safety-critical applications, offered as ASSP or ASIC platforms. OEMs and system integrators will benefit from faster time-to-market, avoiding proprietary lock-ins, and optimized platform cost.
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